general description the ap50n06 is the n-channel logic enhancement mode power field effect transistors are produced using high cell density dmos trench technology. this high density process is especially tailored to minimize on-state resistance. these devices are particularly suited for low voltage application such as lcd inverter, computer power management and dc to dc converter circuits which need low in-line power loss. features
rds(on)≦ mΩ@vgs=10v
super high density cell design for extremely low rds(on)
exceptional on-resistance and maximum dc current capability applications
power management
dc/dc converter
lcd tv & monitor display inverter
ccfl inverter
secondary synchronous rectification