根据企事业大客户培训需求，中科信软提供高级企业cadence pcb设计高级各类技术培训，案例教学，
资深行业专家授课。公开课，上门内训，订制培训。时间灵活，地点灵活。
经验丰富的cadence pcb设计高级培训机构
为什么选择中科信软：
经验丰富-10多年，800多家企业用户培训的经验。
资源丰富-上千名老师专家资源，能根据用户实际匹配最适合的师资。讲师全部拥有 6 年以上相关领域实践经验。
形式灵活-能够根据用户的实际项目需求，随时，随地，24小时提供针对性专业技术服务。
一站式服务-培训课程种类多，能给客户提供各种技术培训，节省客户的时间，可以提供技术咨询，技术指导，专家外包服务，能协助客户完成各种技术支持服务。
售后服务-培训结束后，可以给用户提供技术指导，项目咨询，疑难解答。 cadence pcb设计高级培训/北京cadence pcb设计高级培训/经验丰富的cadence pcb设计高级培训机构
经验丰富的cadence pcb设计高级培训机构
课程内容
1 高速pcb设计中的理论基础
传输线理论、信号完整性（反射、串扰、过冲、地弹、振铃等）、电磁兼容性和时序匹配等等。
2 specctraquest设计流程
2.1 pre-placement
2.2 board setup requirements for extracting and applying topologies
2.3 database setup advisor
—cross-section
—dc nets
—dc voltages
—device setup . ??—si models
—si audit
3 拓扑结构的抽取与仿真 extracting and simulating topologies
3.1 pre-route extraction setup—default model selection.
3.2 pre-route extraction setup—unrouted interconnect
3.3 pre-route template extraction
3.4 sq signal explorer expert
3.5 &analysis preferences
3.6 sigwave
3.7 delay measurements
4 确定和施加约束 determining and adding constraintssolution
4.1 solution spaceanalysis: step 1 to 6
4.2 parametric sweeps.
4.3 constraints :
topology template constraints
switch/settle constraints
assigning the prop delay constraints
impedance constraint
relative propagation delay constraint
diff pair constraints
max parallel constraint
wiring constraint
user-defined constraint
signal integrity constraints
4.4 usage of constraints defined in topology template
5 模板应用和基于约束的布局
template applications and constraint-driven placement
5.1 creating a topology
5.2 wiring the topology
5.3 tlines and trace models
5.4 coupled traces
5.5 rlgc matrix of coupled trace models
5.6 crosstalk simulation in sq signal explorer expert
5.7 simulating with coupled-trace models
5.8 sweep simulation results with coupled-trace models
5.9 extracting a topology using the constraint manager
5.10 electrical constraint set
5.11 applying electrical cset
5.12 worksheet analysis
5.13 spacing and physical rule sets
5.14 electrical rule set
6 基于约束的布线 constraint-driven routing
6.1 manual routing
6.2 routing with the specctra smart route
6.3 driving constraints in routing
7 布线后的drc检查和分析 post-route drc and analysis
7.1 post-route analysis
7.2 signoise
7.3 reflection simulation
7.4 reflection waveform analysis
7.5 comprehensive simulation
7.6 crosstalk simulation
7.7 crosstalk analysis
7.8 simultaneous switching noise simulation
7.9 ssn waveform analysis
7.10 system-level analysis
7.11 a complete design link
7.12 initialize design link
8 差分信号设计 differential pair design exploration
8.1 types of differential pairs in specctraquest
8.2 create differential pair using specctraquest
8.3 create differential pair using constraint manager
8.4 assigning differential pair signal models
8.5 preference to extract unrouted differential pair topology
8.6 extracting unrouted differential pair topology
8.7 custom stimulus to analyze differential pair topology
8.8 differential pair topology analysis
8.9 coupled trace model and differential pair topology
8.10 layout cross-section editor
8.11 differential pair constraints
8.12 differential pair constraints in the constraint manager
8.13 differential pair analysis in the constraint manager
8.14 post route extraction cadence pcb设计高级培训/北京cadence pcb设计高级培训/经验丰富的cadence pcb设计高级培训机构
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